Quantum Circuit Compilation
Quantum Compilation — Circuit Synthesis & Routing · Quantum Software
Make quantum programs runnable — compile and route circuits to hardware with the fewest two-qubit gates so the result survives noise.
📋 The problem
Quantum programs must be mapped to hardware with limited connectivity and a native gate set. Since each two-qubit gate adds error, compiling to the fewest gates — while preserving semantics — decides whether a result survives noise.
🧗 Why it's a grand challenge
Routing / qubit-mapping is NP-hard; synthesis and routing interact; the objective (success probability) is noise- and topology-dependent.
🧮 Governing model
minimize N₂(routing, synthesis) s.t. coupling graph; P_success ≈ (1−ε₂)^{N₂}Map a logical circuit to a device coupling graph by inserting SWAPs and decomposing to the native gate set; success probability ≈ (1−ε₂)^{N₂} falls with two-qubit-gate count N₂, so minimizing depth/N₂ maximizes fidelity.
Current best: SABRE routing + ZX-calculus / template optimization (Qiskit, t|ket⟩)
🧭 Possible approaches
- RL and search-based routing / mapping
- ZX-calculus and template circuit optimization
- Noise-aware compilation co-designed with the device
🎯 Build the benchmark
Compile circuits to a device topology minimizing two-qubit-gate count (within ~1.1× best-known) with verified equivalence.
Metric: two_qubit_count — two-qubit gates after compile (lower better, normalized)
Datasets to start from: Compilation benchmark circuit suite, Device coupling-map library
🤖 Build an AI agent to solve it
An agent that compiles a circuit to a target device, minimizing gate count and predicted error.
Once a benchmark exists, an AI4Science agent can iterate solutions against it — every verified solution earns PWM.
This is a frontier framing page — an open problem, not yet benchmarked or verified, unlike PWM's mature computational-imaging benchmarks.